The ambition of PRYSTINE is to strengthen and to extend traditional core competencies of the European industry, research and universities in smart mobility and in particular the electronic component and systems and cyber-physical systems domains. PRYSTINE's target is to realize Fail-operational Urban Surround perceptION (FUSION) which is based on robust Radar and LiDAR sensor fusion and control functions in order to enable safe automated driving in urban and rural environments. Therefore, PRYSTINE's high-level goals are: 1. Enhanced reliability and performance, reduced cost and power of FUSION components 2. Dependable embedded control by co-integration of signal processing and AI approaches for FUSION 3. Optimized E/E architecture enabling FUSION-based automated vehicles 4. Fail-operational systems for urban and rural environments based on FUSION PRYSTINE will deliver (a) fail-operational sensor-fusion framework on component level, (b) dependable embedded E/E architectures, and (c) safety compliant integration of Artificial Intelligence (AI) approaches for object recognition, scene understanding, and decision making within automotive applications. The resulting reference FUSION hardware/software architectures and reliable components for autonomous systems will be validated in in 22 industrial demonstrators, such as: 1. Fail-operational autonomous driving platform 2. An electrical and highly automated commercial truck equipped with new FUSION components (such as LiDAR, Radar, camera systems, safety controllers) for advanced perception 3. Highly connected passenger car anticipating traffic situations 4. Sensor fusion in human-machine interfaces for fail-operational control transition in highly automated vehicles PRYSTINE’s well-balanced, value chain oriented consortium, is composed of 60 project partners from 14 different European and non-European countries, including leading automotive OEMs, semiconductor companies, technology partners, and research institutes.

videantis (Hannover/DE) is a hidden champion for processor architecture and advanced SoC design. Our processor architecture is in automotive production in already 15M+ cars to date. With our team of 20 specialists, we are the only SME known in the EU already starting a 5nm design. Our truly unified processing platform is 100% programmable and handles all signal processing tasks with superior PPA (performance, power, area) compared to other solutions. Building upon our reputation in automotive, we scale up the architecture to 100s of cores on a single 5nm die as a reference chip platform for smart sensors up to central HPCs for ADAS/AD. This will enable European OEMs to realise own highest-performance and custom AI SoCs to reduce dependencies from their US and Chinese suppliers, reducing cost by up to 90%. With the EIC funding, we will support the development of the reference platform and become a key driver for Europe’s chip sovereignty and to achieve the goals of the EU Chips Act.

Massive adoption of computing in all aspects of human activity has led to unprecedented growth in the amount of data generated. Machine learning has been employed to classify and infer patterns from this abundance of raw data, at various levels of abstraction. Among the algorithms used, brain-inspired, or “neuromorphic”, computation provides a wide range of classification and/or prediction tools. Additionally, certain implementations come about with a significant promise of energy efficiency: highly optimized Deep Neural Network (DNN) engines, ranging up to the efficiency promise of exploratory Spiking Neural Networks (SNN). Given the slowdown of silicon-only scaling, it is important to extend the roadmap of neuromorphic implementations by leveraging fitting technology innovations. Along these lines, the current project aims to sweep technology options, covering emerging memories and 3D integration, and attempt to pair them with contemporary (DNN) and exploratory (SNN) neuromorphic computing paradigms. The process- and design-compatibility of each technology option will be assessed with respect to established integration practices. Core computational kernels of such DNN/SNN algorithms (e.g. dot-product/integrate-and-fire engines) will be reduced to practice in representative demonstrators.