Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris
Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris
3 Projects, page 1 of 1
assignment_turned_in ProjectFrom 2017Partners:Institut dElectronique, de Microélectronique, de Nanotechnologie, USTL, Institut d'electronique de microélectronique et de nanotechnologie, INSA Hauts-de-France, ENSCL +9 partnersInstitut dElectronique, de Microélectronique, de Nanotechnologie,USTL,Institut d'electronique de microélectronique et de nanotechnologie,INSA Hauts-de-France,ENSCL,Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris,CNRS,UVHC,Centre de Recherche sur lHétéro-Epitaxie et ses Applications,Centre de Recherche sur l'Hétéro-Epitaxie et ses Applications,INSIS,CCIP,Centre National de la Recherche Scientifique/LAAS,ISENFunder: French National Research Agency (ANR) Project Code: ANR-16-CE05-0022Funder Contribution: 458,974 EURGallium Nitride (GaN) devices are foreseen to play a major role in next generation of power electronic applications. This is due to its outstanding material properties and cost-effective manufacturing when grown on silicon substrate. Thus, GaN-based power switches have the potential to enable high efficiency connection of renewable energy sources to the electricity grid. The new technology would enable higher efficiency and less complexity as well as being light-weight with greater functionality, robustness and the ability to operate in a wide ambient temperature range. The ultimate goal for renewable energy companies is to supply/interface their energy to the national grid with minimal loss. This will ultimately mean there will be less demand for energy derived from fossil-fuel sources, and so this way will protect the environment from CO2 emissions. GaN devices are expected to reliably operate at elevated junction temperatures up to at least 225°C (presently used Si-based devices cease to function at ~150°C), easing the constraints on current cooling requirements. Similarly, GaN-based power conversion circuits can operate at higher efficiencies and high frequencies enabling compact converter and inverter designs, up to a 10? reduction in size, cost and weight. This will translate into significant energy saving (~10%), overall cost reduction, increased adoption of renewable energy sources, and improvements in profit for the renewable energy companies. In this frame, we have developed a new concept enabling to boost significantly the GaN-on-silicon device breakdown voltage above 3000 V. The key feature of this concept lies in a backside local removal of the silicon substrate around the drain electrode. One of the main challenges of power devices is the thermal management. This project aims at developing an innovative thermal management solution integrated within the backside trenches, which should generate unique substrate grounded GaN power devices operating at voltages far beyond existing GaN-based devices. Four public institutions IEMN, ESIEE, CRHEA and LAAS will combine their skills to reach this ambitious goal that would lead to a real technological breakthrough for power applications. The DESTINEE research effort addresses key critical components based on the emerging GaN material for next generation of power electronics. It will benefit from existing collaborations with partners that have leadership in their respective domain. The project covers a large added value chain from epitaxy, integrated device technology developments, to prototype device characterisation and preliminary reliability.
more_vert assignment_turned_in ProjectFrom 2015Partners:Institut National des Sciences Appliquées de Lyon - Laboratoire dIngénierie des Matériaux Polymères, Laboratoire de Mathématiques, Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris, CCIP, Laboratoire dinformatique en images et systèmes dinformation (LIRIS) +1 partnersInstitut National des Sciences Appliquées de Lyon - Laboratoire dIngénierie des Matériaux Polymères,Laboratoire de Mathématiques,Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris,CCIP,Laboratoire dinformatique en images et systèmes dinformation (LIRIS),Laboratoire Jean KuntzmannFunder: French National Research Agency (ANR) Project Code: ANR-15-CE40-0006Funder Contribution: 444,074 EURDiscrete exterior calculus has emerged in the last decade as a powerful framework for solving discrete variational problems in image and geometry processing. It simplifies both the formulation of variational problems and their numerical resolution, and is able to extract global optima in many cases. However nothing guarantees that, on digital data like 2D or 3D images, digital curves and surfaces, it approaches the expected result of standard calculus, even when refining the discrete domain toward the limit continuous domain. The CoMeDiC project aims at filling the gap between discrete calculus and standard calculus for subsets of the digital space Z^n. The general idea is to define well-chosen metrics for discrete calculus that make it converge toward continuous values. This approach is now possible due to recent advances in digital geometry on multigrid convergent estimators. Digital calculus then addresses variational problems involving domains such as digital surfaces, curves, graphs living in a higher dimensional ambient space, as well as problems involving discontinuities or subtle boundary conditions. This project addresses theoretical problems like the definition of a sound digital calculus, the study of appropriate estimators for metrics, the statement of convergence properties. It is also concerned with its efficient numerical implementation. It studies also variational problems that present difficulties to standard numerical methods, like problems with discontinuities or free boundaries, or problems involving domains of codimension greater or equal to one as surfaces or curves. Last, this project focuses on three domains of application for digital calculus --- image analysis, digital geometry processing and shape optimisation --- both to guide and nourish theoretical developments, as well as to serve as testbed for digital calculus.
more_vert assignment_turned_in ProjectFrom 2019Partners:ENSMSE, Sigma Clermont, LIMOS, Laboratoire dInformatique, de Modélisation et dOptimisation des Systèmes, Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris +6 partnersENSMSE,Sigma Clermont,LIMOS,Laboratoire dInformatique, de Modélisation et dOptimisation des Systèmes,Chambre de commerce et dindustrie régionale de Paris Ile-de-France, ESIEE Paris,CNRS,LABORATOIRE D'INFORMATIQUE PARIS NORD,CREST,CCIP,INS2I,UCAFunder: French National Research Agency (ANR) Project Code: ANR-19-CE48-0005Funder Contribution: 420,120 EURMassive geometric data is increasingly common thanks to the proliferation of ubiquitous data-collecting devices, presenting vexing challenges for algorithmic processing. Our approach to deal with this amount of data is to, given an approximation parameter eps, construct a small-sized sketch S of the input data, then solve the problem on S, and finally extend this solution to a (1+eps)-approximation to the original problem. Our research is divided into three parts, requiring expertise in statistics, computational geometry, learning, combinatorics, and algorithms. First, we consider the combinatorial properties of geometric data that are relevant to build compact sketches. Second, we consider the time and space complexities of constructing accurate sketches of data in high dimensions, based on the combinatorial and geometric understanding. Finally, we show how to use the small sketches in order to improve the accuracy and running time of optimization algorithms.
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