In the past 25 years, many integrated photovoltaics (IPV) products have been introduced and demonstrated. Mostly BIPV products, but more recently also IIPV and VIPV products. However, large scale deployment and massive market adoption of these technologies and products have not yet taken place. We are at the brink of a huge scale-up and capacity build-up of PV in Europe, that will have a large effect on our living environment. Therefore, it is now urgent and essential that IPV products become widely available and affordable. This is important (1) to generate solar electricity where the demand is (in the built environment) and (2) to enable multifunctional use of area and space in the built environment. Several parties in the MC2.0 consortium have more than 20 years of experience in IPV development and as such have been involved in many earlier projects and studies. We believe that the number one barrier for large scale market uptake of IPV is the high cost. Other - secondary but also important – barriers are immature sector cooperation and certification issues. The overarching ambition of the MC2.0 project is to demonstrate a cost breakthrough for IPV by means of an advanced manufacturing approach, referred to as “mass customization”. In coherence with this approach, we will contribute to solving the other identified barriers. To realize this ambition, the MC2.0 consortium brings together experts and companies on materials for PV laminates (including PV cells), on manufacturing of PV laminates, on manufacturing of IPV products and on market and application of IPV products.

The total EU electronics industry employs ≈20.5 million people, sales exceeding €1 trillion and includes 396,000 SMEs. It is a major contributor to EU GDP and its size continues to grow fueled by demand from consumers to many industries. Despite its many positive impacts, the industry also faces some challenges connected with the enormous quantity of raw materials that it needs for sustainability, the huge quantity of Waste Electrical, Electronics Equipment (WEEE) generated and the threat of competition from Asia. To sustain its growth, to manage the impact of WEEE and to face the competition from Asia, the industry needs innovations in key areas. One such area is the drive for ultra-miniaturisation/ultlra-functionality of equipment. The key current road block/limitation to achieving the goal of ultra-miniaturisation/functionality is how to increase the component density on the printed circuit board (PCB). This is currently limited by the availability of hyper fine pitch solder powder pastes. FineSol aims to deliver at first stage an integrated production line for solder particles with size 1-10 μm and to formulate solder pastes containing these particles. Thus, by proper printing methods (e.g. screen and jet printing) the fabrication of PCBs with more than double component density will be achieved. Consequently, this would effectively enable more than a doubling of the functions available on electronic devices such as cell phones, satellite navigation systems, health devices etc. The successful completion of the FineSol project would lift the ultra-miniaturisation/functionality road block and also enable reduction in raw material usage, reduction in WEEE, reduction in pollution and associated health costs and also a major reduction in EU energy demand with all its indirect benefits for environment and society.

SHINE PV will develop alternative technological routes to PV production for Silicon Heterojunction and TOPCon solar cells, covering the three key steps in the back-end manufacturing: metallization, post-processing and interconnection. SHINE PV will demonstrate different flows and down-select the most promising ones in terms of cost of ownership and high volume manufacturing readiness. Advanced equipment at TRL7 with Industry 4.0 dedicated features, innovative materials and solutions will be developed. For the metallization, SHINE PV will introduce parallel dispensing and plating as High Volume Manufacturing (HVM) alternative processes to incumbent screen printing, with the objective of demonstrating the complete or partial replacement of Ag with Cu, a fundamental step to enable Tera-Watt scale production levels. Moreover, SHINE PV will increase the efficiency through cell post-processing by applying Light Soaking process in HVM and recover the cutting-induced losses by Edge Re-Passivation. For the module making step, the innovations in interconnection proposed are Twill and Shingling processes and HVM equipment. Both will leverage on the optimization of the metallization and post-processing steps and will demonstrate their potential in terms of superior electrical properties, aesthetics, reliability, and compatibility with premium module designs. The expectation of the project is to enable an increase of solar cell (or module) efficiency of 0.5% absolute versus the reference process with a simultaneous CoO reduction of 20%, due to reduced material costs and increased equipment productivity. SHINE PV project will demonstrate the integrated innovative processes and novel equipment both virtually and within physical pilots at industrial partners at TRL7. To our knowledge for all these technologies no production equipment is available for HVM worldwide, and we envision a great potential for a PV supply chain revamping in EU.

The objectives of the interdisciplinary project IQubits are to (i) develop and demonstrate experimentally high-temperature (high-T) Si and SiGe electron/hole-spin qubits and qubit integrated circuits (ICs) in commercial 22nm Fully-Depleted Silicon-on-Insulator (FDSOI) CMOS foundry technology as the enabling fundamental building blocks of quantum computing technologies, (ii) verify the scalability of these qubits to 10nm dimensions through fabrication experiments and (iii) prove through atomistic simulations that, at 2nm dimensions, they are suitable for 300K operation. The proposed 22nm FDSOI qubit ICs consist of coupled quantum-dot electron and hole spin qubits, placed in the atomic-scale channel of multi-gate n- and p-MOSFETs, and of 60-240GHz spin control/readout circuits integrated on the same die in state-of-the-art FDSOI CMOS foundry technology. To assess the impact of future CMOS scaling, more aggressively scaled Si-channel SOI and nitride-channel qubit structures will also be designed and fabricated in two experimental processes with 10nm gate half pitch. The latter will be developed in this project. The plan is for the III-nitrides (III-N) qubits to be ultimately grown on a SOI wafer, to be compatible with CMOS. Because of their larger bandgap, III-N hold a better prospect than Si and SiGe for qubits with larger coupling energy and mode energy splitting, and 300K operation. As a radical breakthrough, the fabricated qubits will feature coupling energies on the order of 0.25-1 meV corresponding to control frequencies in the 60-240GHz range, suitable for operation at 3–12 degrees Kelvin, two orders of magnitude higher than today's qubits. The tuned mm-wave circuits allow for 10-20ps spin control pulses which help to filter out wideband thermal noise and largely enhance the ratio between the gating and the decoherence times. Thermal noise filtering and fast control of the spin may lead to even higher temperature operation for a given energy-level splitting.