Virtual platforms have been mainly used to support anticipation of embedded software (eSW) development of very complex System on Chip (SoC) or for Software-based functional validation of complex IP. The explosion of the number of connected things change the complexity paradigm: the challenge is now to manage hundreds of distributed platforms (SoCs or boards) that include processors, sensors, MEMs and communication devices. Using physical board to prototype each of these platforms to verify the overall system behaviour is too expensive and not scalable for system providers. System integrators require a scalable solution for system prototyping. The use of virtual platforms appears to be the answer, but they lack tools to deploy and integrate this solution in their prototyping flow. According to state of the art and technical analysis with CEA and Fraunhofer, no such solution is available today; as a long time provider of hardware integration platform, Magillem has been a pioneer in design environment software for SoC integration and SoC virtual platform since its early days and believe to be in a unique position to introduce a very innovative solution for IoT enablement. By using PILoTS, European leading system integrators, as well as suppliers of MEMS, micro-controllers, connected systems would save time and cost, during design, verification and certification, and vastly improve their competitiveness.

In the context of high end mobile appliances for the multimedia and telecom market, the use of ad-hoc accelerators for both computation and communication is absolutely necessary due to the power efficiency requirements. Considering a platform as a configurable SW and HW environment, the HOSPI project focuses on the definition and implementation of a practical approach to perform rapid and optimized deployment and integration of application specifications on a configurable platform. The objective of the HOSPI project is to define innovative methods, and implement the associated tools, to ease the mapping of data-streaming applications on heterogeneous platforms. From a practical point of view, it implies to reduce the gap that exists between the application description, i.e. high level specification that does not make any assumption on the implementation, and the platform description, that includes pieces of hardware and pieces of software to support the actual implementation. We propose a 3 steps process: a) use a general-purpose environment to describe and parallelize the application. This environment will be based on Process Networks (PN) to express the coarse grain parallelism of the application, b) provide an abstract view of the platform, both on communications and computations sides, based on an XML view. The target formalism will be inspired from the existing IP-XACT schema, but will require many still to be identified add-ons to express the platform capabilities and parameters, and c) define relationships between these two views in order to automate the way the application can be mapped from its PN representation onto the HW platform. These relationships will be used to express the mapping choices, and be supported by tools to automate the generation (or parameterization) of the HW and SW. The approach proposed in the HOSPI project requires abstracting the relevant information from both the specification and the target platform. In that sense, it necessitates the application to express more concretely its computation and communication behavior, and the platform to provide in a clear way its capabilities. Using these abstracted views, performing the mapping of the application on the platform and generating all the required configuration files for hardware and software production tools can be automated, leaving the design decisions in the hands of the system integrator.

Today, System-on-chip (SoC) and System-in-package (SiP) become more and more complex and include not only digital blocks but also analogue parts, radio frequency (RF) communication capabilities as well as sensor/actuators. This is due to advances in semiconductor technology and the market demands to add application-specification components such as image sensors and RF components inside chips. Therefore designers have to face both the acceleration of the market and the silicon process roadmap. Unfortunately a complete design flow, starting at system level with functional specifications till automatic layout generation is not available for a SoC mixing heterogeneous physical domains. If reliable design flows are available for purely digital chips, many elements of this flow are lacking for analogue or RF parts. Nowadays, each of these blocks of the design is independently simulated / verified using relevant dedicated tools, but not its integration inside the whole system. This prevents detecting design errors before fabrication resulting in a very costly redesign loop and may impact the application itself. Hence the challenge of this project is to model the whole system with a single hardware description language and to simulate it in the same environment. In this project, we intend to provide a method, together with a design environment, based on SystemC and SystemC-AMS capabilities, to perform modelling and simulation of complex heterogeneous (AMS and RF) SoCs and validate this approach with an industrial application : a Wireless Video System (WVS). This application combines a high dynamic range video sensor, an analog-to-digital converter, a RF transceiver at 60Ghz together with a general purpose 32-bit processor. As results of this project, System-C and System-C/AMS models for the various parts of the SoC will be provided. The level of abstraction will be adapted to support the simulation of the complete system including the operating system and the application software layers. In order to formalize the abstraction of analog and RF IPs, we will establish a list of candidate extensions of the IP-XACT schema and propose it to the SPIRIT Consortium. This will enable us to provide a new framework, whose functionalities will be dedicated to the design, simulation and performance optimization of AMS systems, as an extension of the commercial existing environment currently dedicated to digital systems and whose structure is based on the exploitation of SPIRIT IP-XACT. This framework will be used to perform design space exploration of the whole system by varying each block specification and analyzing the system performance and investigating the accuracy/simulation-time efficiency. Up to 40 SoCs exchanging video information through RF links will be considered. In the WASABI project, two academic partners (IEMN, UPMC) and two industrial partners (STMicroelectronics and MDS) will share their complementary knowledge to handle the challenge of modelling and simulation of a complete AMS SoC.

Stroke a leading cause of death and disability, with an estimated total cost of €65 billion per year in Europe. Even though preventive measures are in place by national health systems to reduce the incidence of stroke, the number of persons having a stroke in Europe is likely to increase from 1.1 million per year in 2000 to more than 1.5 million per year in 2025 because of the increasing ageing population. When not fatal, stroke is very heterogeneous in terms of recovery outcome, but, generally, it is estimated that 24% to 74% of the 50 million stroke survivors worldwide require some assistance or are fully-dependent on caregivers for Activities of Daily Life (ADL) such as walking, toileting, dressing, preparing meals, sleeping. Thus, stroke is a chronic condition, which negatively influences independence in daily life. The assessment of stroke survivors’ functional independence in daily activities is usually done by scales such as the Barthel Index (BI) and the Functional Independence Measure. However, as these scales rely on average recovery patterns, they might have little relevance for an individual patient or clinician, who need a personalised evaluations of their independence levels based on their living environments and habits. Furthermore, these scales are based on subjective first-person or carers’ accounts. On the contrary, it would be interesting and useful for the stroke survivors, their carers and clinicians to base the evaluation on objective data on daily activities provided by a number of non-obtrusive sensors. Such sensors may provide information on the number of steps a person walks, activity duration, the time in sedentary versus upright position, as well as energy expenditure. Thus, the main goal of MEMENTO (Monitoring of Everyday Motor activitiEs to support iNdependence of sTrOke survivors) project is to provide patients, carers and clinicians with objective and timely data on stroke survivor’s daily physical activities once at home. This information will facilitate patients, carers’ and clinicians’ understanding of the level of physical independence achieved by the individual and will thus support the tailoring of monitoring and, eventually, rehabilitation programs to every person’s needs. These data will be collected by unobtrusive sensors, preserving as much as possible stroke survivors’ privacy. Based on existing technologies and knowledge in the partners’ institutions, we will integrate and test an affordable and easy-to-use monitoring system informing stroke survivors and their carers about daily physical activities and the relations that these activities have with functional independence. The Consortium is formed by 5 Partners. There are 2 research institutions, namely CEA (coordinator) working on sensing and patient-centred evaluation, and IFSTTAR working on innovative measures for patient independence evaluation. There are also 2 industrial partners providing technological solutions. Thus, Magillem Design Services provides a software for data analysis and Bluelinea provides remote monitoring services. These partners will also exploit the technological solutions to be developed by CEA. Finally, there is one user organisation (Fondation Hopale) working on end-user needs elicitation and technology evaluation. Thus, the development and evaluation of the MEMENTO system will be achieved thanks to the various individual partner competences and expertise which result in a coherent global task force going beyond the individual partners’ expertise sum. The diversity of technical skills, business development experiences and user knowledge represented by the consortium will ensure that all the driving forces of a successful product development are properly addressed (user needs, usability, efficiency, regulatory constraints, and market up-take).